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TMS320C6201 定点数字信号处理器

数据:

描述

The TMS320C62x™ DSPs (including the TMS320C6201) are the fixed-point DSP family in the TMS320C6000™ DSP platform. The C6201 device is based on the high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications. With performance of up to 1600 MIPS at a clock rate of 200 MHz, the C6201 offers cost-effective solutions to high-performance DSP programming challenges. The C6201 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide six arithmetic logic units (ALUs) for a high degree of parallelism and two 16-bit multipliers for a 32-bit result. The C6201 can produce two multiply-accumulates (MACs) per cycle--for a total of 466 million MACs per second (MMACS). The C62x™ DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

The C6201 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory of the C6201 consists of two 32K-byte blocks of RAM for improved concurrency. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.

The C62x™ DSP has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

特性

  • 高性能定点数字信号处理器(DSP)TMS320C6201
    • 5 ns指令周期时间
    • 200-MHz时钟速率
    • 8个32位指令/周期
    • 1600 MIPS
  • VelociTI ??高级超长指令字(VLIW)TMS320C62x ?? DSP CPU核心
    • 八个独立功能单元:
      • 六个ALU(32/40位)
      • 两个16位乘法器(32位结果)
    • 32个32位通用寄存器的加载存储架构
    • 指令打包减少代码大小
    • 所有指令条件
    • li>
  • 指令集功能
    • 字节可寻址(8位,16位,32位数据)
    • 32位地址范围< /li>
    • 8位溢出保护
    • 饱和度
    • 位域提取,设置,清除
    • 位计数
    • 规范化
  • 1M位片上SRAM
    • 512K位内部编程/高速缓存(16K 32位指令)
    • 512K位双访问内部数据(64K字节)组织为两个块以提高并发性
  • 32位外部存储器接口(EMIF)
    • 异步存储器的无缝接口:SRAM和EPROM
    • 同步存储器的无胶接口:SDRAM和SBSRAM
  • Four-Cha nnel使用辅助通道引导加载直接内存访问(DMA)控制器
  • 16位主机端口接口(HPI)
    • 访问整个内存映射
  • 两个多通道缓冲串行端口(McBSP)
    • 与T1 /E1,MVIP,SCSA成帧器的直接接口
    • 兼容ST-Bus切换
    • 每个最多256个通道
    • AC97兼容
    • 串行外设接口(SPI)兼容(Motorola ??)
  • < li>两个32位通用定时器
  • 灵活的锁相环(PLL)时钟发生器
  • IEEE-1149.1(JTAG )兼容边界扫描
  • 352引脚BGA封装(GJC后缀)
  • 352引脚BGA封装(GJL后缀)
  • CMOS技术
    • 0.18-μm/5级金属工艺
  • 3.3-VI /Os,1.8 -V Internal

VelociTI和TMS320C62x是德州仪器公司的商标。
Motorola是Motorola,Inc。的商标。
IEEE标准1149.1-1990标准 - 测试访问端口和边界扫描架构。
TMS320C6000和C62x是Texas Instruments的商标。
Windows是Microsoft Corporation的注册商标。
在本文档的其余部分中,TMS320C6201器件应称为C6201。

参数 与其它产品相比 其他 C6000 DSP

 
DSP
TMS320C6201
1 C62x    

方框图 (1)