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TMS320C6203B 定点数字信号处理器

数据:

描述

TMS320C6203B器件是TMS320C62x的一部分? TMS320C6000中的定点DSP生成? DSP平台。 C62x ?? DSP器件基于高性能,先进的VelociTI ??德州仪器(TI)开发的超长指令字(VLIW)架构,使这些DSP成为多通道和多功能应用的绝佳选择。

TMS320C62x ?? DSP为高性能DSP编程挑战提供了经济高效的解决方案。 TMS320C6203B在300 MHz的时钟速率下具有高达2400 MIPS的性能。 C6203B DSP具有高速控制器的操作灵活性和阵列处理器的数字能力。该处理器具有32个32位字长的通用寄存器和8个高度独立的功能单元。八个功能单元提供六个算术逻辑单元(ALU)以实现高度并行性,两个16位乘法器提供32位结果。 C6203B每周期可产生两个乘法累加(MAC),总计每秒6亿MAC(MMACS)。 C6203B DSP还具有专用硬件逻辑,片上存储器和额外的片上外设。

C6203B器件程序存储器由两个模块组成,256K字节模块配置为存储器 - 映射程序空间,另一个128K字节块用户可配置为缓存或内存映射程序空间。 C6203B的数据存储器由两个256K字节的RAM块组成。

C6203B器件具有强大而多样的外设集。外设集包括三个多通道缓冲串行端口(McBSP),两个通用定时器,一个32位扩展总线(XBus),可轻松连接同步或异步行业标准主机总线协议,以及无缝32位外部存储器接口(EMIF)能够连接到SDRAM或SBSRAM和异步外设。

C62x ??设备有一套完整的开发工具,包括:一个新的C编译器,一个简化编程和调度的汇编优化器,以及一个Windows?调试器接口,用于查看源代码执行。

特性

  • High-Performance Fixed-Point Digital Signal Processor (DSP) - TMS320C62x™
    • 4-, 3.33-ns Instruction Cycle Time
    • 250-, 300-MHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • 2000, 2400 MIPS
  • C6203B and C6202 GLS Ball Grid Array (BGA) Packages are Pin-Compatible With the C6204 GLW BGA Package
  • C6203B and C6202B GNZ, GNY and ZNY Packages are Pin-Compatible
  • VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) C62x™ DSP Core
    • Eight Highly Independent Functional Units:
      • Six ALUs (32-/40-Bit)
      • Two 16-Bit Multipliers (32-Bit Result)
    • Load-Store Architecture With 32 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Byte-Addressable (8-, 16-, 32-Bit Data)
    • 8-Bit Overflow Protection
    • Saturation
    • Bit-Field Extract, Set, Clear
    • Bit-Counting
    • Normalization
  • 7M-Bit On-Chip SRAM
    • 3M-Bit Internal Program/Cache (96K 32-Bit Instructions)
    • 4M-Bit Dual-Access Internal Data (512K Bytes)
      • Organized as Two 256K-Byte Blocks for Improved Concurrency
  • 32-Bit External Memory Interface (EMIF)
    • Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
    • Glueless Interface to Asynchronous Memories: SRAM and EPROM
    • 52M-Byte Addressable External Memory Space
  • Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
  • Flexible Phase-Locked-Loop (PLL) Clock Generator
  • 32-Bit Expansion Bus (XBus)
    • Glueless/Low-Glue Interface to Popular PCI Bridge Chips
    • Glueless/Low-Glue Interface to Popular Synchronous or Asynchronous Microprocessor Buses
    • Master/Slave Functionality
    • Glueless Interface to Synchronous FIFOs and Asynchronous Peripherals
  • Three Multichannel Buffered Serial Ports (McBSPs)
    • Direct Interface to T1/E1, MVIP, SCSA Framers
    • ST-Bus-Switching Compatible
    • Up to 256 Channels Each
    • AC97-Compatible
    • Serial-Peripheral Interface (SPI) Compatible (Motorola™)
  • Two 32-Bit General-Purpose Timers
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • 352-Pin BGA Package (GNZ)
  • 384-Pin BGA Package (GLS)
  • 384-Pin BGA Package (GNY and ZNY)
  • 0.15-µm/5-Level Metal Process
    • CMOS Technology
  • 3.3-V I/Os, 1.5-V Internal

TMS320C62x, VelociTI, and C62x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
All trademarks are the property of their respective owners.
For more details, see the GLS BGA package bottom view.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000 and C6000 are trademarks of Texas Instruments.
Windows is a registered trademark of the Microsoft Corporation.

参数 与其它产品相比 其他 C6000 DSP

 
DSP
TMS320C6203B
1 C62x    

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