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数据: TMS320C6674 Multicore Fixed and Floating-Point Digital Signal Processor 数据表
TMS320C6674多核固定和浮点数字信号处理器基于TI的KeyStone多核架构。与四个C66x CorePac DSP集成,每个内核运行速度为1.0至1.25 GHz,最高可达5 GHz。该器件支持高性能信号处理应用,如关键任务,医学成像,测试和自动化。 C6674平台功能强大且易于使用。 C66x CorePac DSP完全向后兼容所有现有的C6000系列固定和浮点DSP。
Applications |
DSP |
DSP MHz (Max) |
DSP GFLOPS |
Total On-Chip Memory (KB) |
On-Chip L2 Cache/RAM |
EMAC |
PCI/PCIe |
Serial I/O |
Operating Temperature Range (C) |
DRAM |
Other On-Chip Memory |
Hardware Accelerators |
Package Size: mm2:W x L (PKG) |
TMS320C6674 | TMS320C6670 | TMS320C6671 | TMS320C6672 | TMS320C6678 |
---|---|---|---|---|
Communications and Telecom | Communications and Telecom | Communications and Telecom | Communications and Telecom | Communications and Telecom |
4 C66x | 4 C66x | 1 C66x | 2 C66x | 8 C66x |
1000 | 1000 1200 | 1000 1250 | 1000 1250 1500 | 1000 1250 |
64 80 | 64 76.8 | 16 20 | 32 40 48 | 128 160 |
6528 | 6528 | 4800 | 5376 | 8832 |
2048 KB | 4096 KB | 512 KB | 1024 KB | 4096 KB |
2-Port 1Gb Switch | 10/100/1000 | 2-Port 1Gb Switch | 2-Port 1Gb Switch | 2-Port 1Gb Switch |
2 PCIe Gen2 | 2 PCIe Gen2 | 2 PCIe Gen2 | 2 PCIe Gen2 | 2 PCIe Gen2 |
I2C RapidIO SPI TSIP UART | AIF2 I2C RapidIO SPI UART | I2C RapidIO SPI TSIP UART | I2C RapidIO SPI TSIP UART | I2C RapidIO SPI TSIP UART |
-40 to 100 0 to 85 | -40 to 100 0 to 85 | -40 to 100 0 to 85 | -40 to 100 0 to 85 | -40 to 100 0 to 85 |
DDR3 | DDR3 | DDR3 | DDR3 | DDR3 |
4096 KB | 2048 KB | 4096 KB | 4096 KB | 4096 KB |
0 | FFT Coprocessor TCP3d TCP3e VCP2 | 0 | 0 | 0 |
See datasheet (FCBGA) | See datasheet (FCBGA) | See datasheet (FCBGA) | See datasheet (FCBGA) | See datasheet (FCBGA) |