具有集成 PLL 和 3 个 LVDS/5 个 LVPECL 输出的 1 至 800MHz 精密时钟分配器
| Function | Clock generator |
| Number of outputs | 8 |
| Output frequency (Max) (MHz) | 800 |
| Core supply voltage (V) | 3.3 |
| Output supply voltage (V) | 3.3 |
| Input type | LVCMOS, LVPECL |
| Output type | LVDS |
| Operating temperature range (C) | -40 to 85 |
| Features | Integrated integer-N PLL, uWire |
| Rating | Catalog |
- 20 fs Additive Jitter
- Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz
- Clock Output Frequency Range of 1 to 800 MHz
- 3 LVDS and 5 LVPECL Clock Outputs
- Dedicated Divider and Delay Blocks on Each Clock Output
- Pin Compatible Family of Clocking Devices
- 3.15 to 3.45 V Operation
- Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)
The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), three LVDS, and five LVPECL clock output distribution blocks.
Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.
The clock conditioner comes in a 48-pin WQFN package and is footprint compatible with other clocking devices in the same family.
