--- 产品详情 ---
Iq (Typ) (uA) | 12000 |
Features | Automatic log of time into RAM at power failure, 12/24 hour, Parallel bus interface |
Rating | Catalog |
Operating temperature range (C) | -40 to 85 |
Supply voltage (Max) (V) | 5.5 |
Supply voltage (Min) (V) | 4.5 |
- Full function real time clock/calendar
- 12/24 hour mode timekeeping
- Day of week counter
- Parallel resonant oscillator
- Power fail features
- Internal power supply switch to external battery
- Power Supply Bus glitch protection
- Automatic log of time into RAM at power failure
- On-chip interrupt structure
- Periodic, alarm, and power fail interrupts
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Copyright ? 1995 National Semiconductor Corporation
Learn About and Influence The Site
The DP8573A is intended for use in microprocessor based systems where information is required for multi-tasking, data logging or general time of day/date information. This device is implemented in low voltage silicon gate microCMOS technology to provide low standby power in battery back-up environments. The circuit's architecture is such that it looks like a contiguous block of memory or I/O ports organized as one block of 32 bytes. This includes the Control Registers, the Clock Counters, the Alarm Compare RAM, and the Time Save RAM.
Time and date are maintained from 1/100 of a second to year and leap year in a BCD format, 12 or 24 hour modes. Day of week and day of month counters are provided. Time is controlled by an on-chip crystal oscillator requiring only the addition of the 32.768 kHz crystal and two capacitors.
Power failure logic and control functions have been integrated on chip. This logic is used by the RTC to issue a power fail interrupt, and lock out the μP interface. The time power fails may be logged into RAM automatically when VBB > VCC. Additionally, two supply pins are provided. When VBB > VCC, internal circuitry will automatically switch from the main supply to the battery supply.
The DP8573A's interrupt structure provides three basic types of interrupts: Periodic, Alarm/Compare, and Power Fail. Interrupt mask and status registers enable the masking and easy determination of each interrupt.
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