| Sample rate (Max) (MSPS) | 80 |
| Resolution (Bits) | 12 |
| Number of input channels | 1 |
| Interface type | Parallel CMOS, TTL |
| Analog input BW (MHz) | 450 |
| Features | Low Power |
| Rating | Catalog |
| Input range (Vp-p) | 2 |
| Power consumption (Typ) (mW) | 425 |
| Architecture | Pipeline |
| SNR (dB) | 66 |
| ENOB (Bits) | 10.7 |
| SFDR (dB) | 80 |
| Operating temperature range (C) | -40 to 85 |
| Input buffer | No |
- Single Supply Operation
- Low Power Consumption
- Power Down Mode
- Internal or External Reference
- Selectable Offset Binary or 2's Complement Data Format
- Pin-Compatible with ADC12010, ADC12020, ADC12040, ADC12L063, ADC12L066
Key Specifications
- Full Power Bandwidth: 450 MHz
- DNL: ±0.4 LSB (typ)
- SNR (fIN = 10 MHz): 66 dB (typ)
- SFDR (fIN = 10 MHz): 80 dB (typ)
- Power Consumption, 80 MHz
- Operating: 425 mW (typ)
- Power Down: 50 mW (typ)
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The ADC12L080 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 80 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. The ADC12L080 can be operated with either the internal or an external reference. Operating on a single 3.3V power supply, this device consumes just 425 mW at 80 MSPS, including the reference current. The Power Down feature reduces power consumption to just 50 mW.
The differential inputs provide a full scale input swing equal to ±VREF. The buffered, high impedance, single-ended external reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format may be selected as either offset binary or two's complement.
This device is available in the 32-lead LQFP package and operates over the industrial temperature range of ?40°C to +85°C.
