--- 产品详情 ---
Technology Family | AUP |
Supply voltage (Min) (V) | 0.8 |
Supply voltage (Max) (V) | 3.6 |
Number of channels (#) | 1 |
IOL (Max) (mA) | 4 |
ICC (Max) (uA) | 0.9 |
IOH (Max) (mA) | -4 |
Input type | Standard CMOS |
Output type | 3-State |
Features | Balanced outputs, Very high speed (tpd 5-10ns), Partial power down (Ioff), Over-voltage tolerant inputs |
Rating | Catalog |
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22?
- 2000-V Human-Body Model
(A114-B, Class II) - 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model
- Available in the Texas Instruments NanoStar? Package
- Low Static-Power Consumption
(ICC = 0.9 μA Maximum) - Low Dynamic-Power Consumption
(Cpd = 4 pF Typical at 3.3 V) - Low Input Capacitance (Ci = 1.5 pF Typical)
- Low Noise – Overshoot and Undershoot
<10% of VCC - Input-Disable Feature Allows Floating Input Conditions
- Ioff Supports Partial-Power-Down Mode Operation
- Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at Input
- Wide Operating VCC Range of 0.8 V to 3.6 V
- Optimized for 3.3-V Operation
- 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- tpd = 4.6 ns Maximum at 3.3 V
- Suitable for Point-to-Point Applications
The AUP family is TI?s premier solution to the industry?s low-power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The Lowest-Power Family and Excellent Signal Integrity ).
This bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is low. This device has the input-disable feature, which allows floating input signals.
To assure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
NanoStar? package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
为你推荐
-
TI数字多路复用器和编码器SN54HC1512022-12-23 15:12
-
TI数字多路复用器和编码器SN54LS1532022-12-23 15:12
-
TI数字多路复用器和编码器CD54HC1472022-12-23 15:12
-
TI数字多路复用器和编码器CY74FCT2257T2022-12-23 15:12
-
TI数字多路复用器和编码器SN74LVC257A2022-12-23 15:12
-
TI数字多路复用器和编码器SN74LVC157A2022-12-23 15:12
-
TI数字多路复用器和编码器SN74ALS258A2022-12-23 15:12
-
TI数字多路复用器和编码器SN74ALS257A2022-12-23 15:12
-
TI数字多路复用器和编码器SN74ALS157A2022-12-23 15:12
-
TI数字多路复用器和编码器SN74AHCT1582022-12-23 15:12
-
如何利用运算放大器设计振荡电路?2023-08-09 08:08
-
【PCB设计必备】31条布线技巧2023-08-03 08:09
-
电动汽车直流快充方案设计【含参考设计】2023-08-03 08:08
-
Buck电路的原理及器件选型指南2023-07-31 22:28
-
100W USB PD 3.0电源2023-07-31 22:27
-
千万不要忽略PCB设计中线宽线距的重要性2023-07-31 22:27
-
基于STM32的300W无刷直流电机驱动方案2023-07-06 10:02
-
上新啦!开发板仅需9.9元!2023-06-21 17:43
-
参考设计 | 2KW AC/DC数字电源方案2023-06-21 17:43
-
千万不能小瞧的PCB半孔板2023-06-21 17:34