具有 3 态输出的增强型产品 8 位移位寄存器
| Configuration | Serial-in, Parallel-out |
| Bits (#) | 8 |
| Technology Family | HC |
| Supply voltage (Min) (V) | 2 |
| Supply voltage (Max) (V) | 6 |
| Input type | Standard CMOS |
| Output type | 3-State |
| Clock Frequency (MHz) | 24 |
| IOL (Max) (mA) | 7.8 |
| IOH (Max) (mA) | -7.8 |
| ICC (Max) (uA) | 80 |
| Features | Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode, Output register |
- 8-Bit Serial-In, Parallel-Out Shift
- Wide Operating Voltage Range of 2 V to 6 V
- High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads
- Low Power Consumption: 80-μA (Max) ICC
- tpd = 13 ns (Typ)
- ±6-mA Output Drive at 5 V
- Low Input Current: 1 μA (Max)
- Shift Register Has Direct Clear
- APPLICATIONS
- Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
- Available in Military (–55°C/125°C) Temperature Range(1)
- Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability
(1) Additional temperature ranges available - contact factory
The SN74HC595 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.
Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.
