具有清零和预置端的双路正边沿触发式 D 型触发器
| Number of channels (#) | 2 |
| Technology Family | ACT |
| Supply voltage (Min) (V) | 4.5 |
| Supply voltage (Max) (V) | 5.5 |
| Input type | TTL-Compatible CMOS |
| Output type | Push-Pull |
| Clock Frequency (Max) (MHz) | 100 |
| IOL (Max) (mA) | 24 |
| IOH (Max) (mA) | -24 |
| ICC (Max) (uA) | 40 |
| Features | Balanced outputs, Very high speed (tpd 5-10ns), Positive input clamp diode |
- Inputs Are TTL-Voltage Compatible
- Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise
- EPICTM (Enhanced-Performance Implanted CMOS) 1-
m Process - 500-mA Typical Latch-Up Immunity at 125°C
- Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (N)
?
EPIC is a trademark of Texas Instruments Incorporated.
This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset (
) or clear (
) input sets or resets the outputs regardless of the levels of the other inputs. When and are inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the low-to-high transition of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.
The 74ACT11074 is characterized for operation from -40°C to 85°C.
