--- 产品详情 ---
汽车类单路 3 输入正或与门
Technology Family | LVC |
Supply voltage (Min) (V) | 1.65 |
Supply voltage (Max) (V) | 5.5 |
Number of channels (#) | 1 |
Inputs per channel | 3 |
IOL (Max) (mA) | 32 |
IOH (Max) (mA) | -32 |
Input type | Standard CMOS |
Output type | Push-Pull |
Features | Partial power down (Ioff), Over-voltage tolerant inputs, Ultra high speed (tpd <5ns) |
Data rate (Max) (Mbps) | 100 |
Rating | Automotive |
Operating temperature range (C) | -40 to 85 |
| |
- Qualified for Automotive Applications
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 5 ns at 3.3 V
- Low Power Consumption, 10-μA Max ICC
- ±24-mA Output Drive at 3.3 V
- Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input
(Vhys = 250 mV Typ at 3.3 V) - Can Be Used in Three Combinations:
- OR-AND Gate
- OR Gate
- AND Gate
- Ioff Supports Partial-Power-Down Mode Operation
This device is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G3208-Q1 is a single 3-input positive OR-AND gate. It performs the Boolean function Y = (A + B) ? C in positive logic.
By tying one input to GND or VCC, the SN74LVC1G3208-Q1 offers two more functions. When C is tied to VCC, this device performs as a 2-input OR gate (Y = A + B). When A is tied to GND, the device works as a 2-input AND gate (Y = B ? C). This device also works as a 2-input AND gate when B is tied to GND (Y = A ? C).
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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