| Technology Family | LVC |
| Supply voltage (Min) (V) | 1.65 |
| Supply voltage (Max) (V) | 5.5 |
| Number of channels (#) | 2 |
| Inputs per channel | 2 |
| IOL (Max) (mA) | 32 |
| IOH (Max) (mA) | -32 |
| Input type | Schmitt-Trigger |
| Output type | Push-Pull |
| Features | Partial power down (Ioff), Over-voltage tolerant inputs, Ultra high speed (tpd <5ns) |
| Data rate (Max) (Mbps) | 100 |
| Rating | Catalog |
- Available in Texas Instruments NanoFree Package
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 5.3 ns at 3.3 V
- Low Power Consumption, 10-μA Max ICC
- ±24-mA Output Drive at 3.3 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
- Ioff Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection
- Support Translation Down (5V to 3.3V and 3.3V to 1.8V)
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
This dual 2-input NAND gate with Schmitt-trigger inputs is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G132 contains two inverters and performs the Boolean function Y = A ? B or Y = A + B in positive logic. The device functions as two independent inverters, but because of Schmitt action, it has different input threshold levels for positive-going (VT+) and negative-going (VT-) signals.
NanoFree? package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
