| Vin (Min) (V) | 4.5 |
| Vin (Max) (V) | 17 |
| Vout (Min) (V) | 0.25 |
| Vout (Max) (V) | 5.5 |
| Iout (Max) (A) | 765 |
| Iq (Typ) (uA) | 50000 |
| Switching frequency (Min) (kHz) | 300 |
| Switching frequency (Max) (kHz) | 1500 |
| Features | Adjustable Current Limit, Dynamic Voltage Scaling, Enable, Frequency Synchronization, I2C, Light Load Efficiency, Multiple Outputs, PMBus, Phase Interleaving, Power Good, Pre-Bias Start-Up, Remote Sense, SVID, Synchronous Rectification, UVLO Adjustable, Voltage Margining |
| Regulated outputs (#) | 2 |
| Number of phases | 12 |
| Rating | Catalog |
- Input voltage range: 4.5 V to 17 V
- Output voltage range: 0.25 V to 5.5 V
- Dual output supporting N+M phase configurations (N+M ≤ 12, M ≤ 6)
- Intel VR14 SVID compliant with PSYS support
- Backward compatible to VR13.HC/VR13.0 SVID
- Automatic NVM fault status logging
- Dynamic current limit for improved Fast-Vmode performance
- Fully compatible with TI NexFET? power stage for high-density solutions
- Enhanced D-CAP+ control to provider superior transient performance with excellent dynamic current sharing
- Dynamic phase shedding with programmable thresholds for optimizing efficiency at light and heavy loads
- Configurable with non-volatile memory (NVM) for low external component count
- Accurate, adjustable, adaptive voltage positioning (AVP, load line) support
- Individual per-phase IMON calibration, with multi-slope gain calibration to increase system accuracy.
- Fast phase-adding for transient undershoot reduction
- Diode braking with programmable timeout for reduced transient overshoot
- Patented AutoBalance? current sharing
- Programmable per-phase valley current limit (OCL)
- PMBus? v1.3.1 system interface for telemetry of voltage, current, power, temperature, and fault conditions
- Programmable loop compensation through PMBus
- Driverless configuration for efficient high- frequency switching
- 6 mm × 6 mm, 48-pin, QFN package
The TPS536C9 is a VR14 SVID compliant step down controller with two channels, built-in non-volatile memory (NVM), and PMBus? interface, and is fully compatible with TI NexFET? power stages. Advanced control features such as the D-CAP+ architecture with undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, low output capacitance, and good dynamic current sharing. The device also provides novel phase interleaving strategy and dynamic phase shedding for efficiency improvement at different loads. Adjustable control of output voltage slew rate and adaptive voltage positioning are natively supported. In addition, the device supports the PMBus communication interface for reporting the telemetry of voltage, current, power, temperature, and fault conditions to the host system. All programmable parameters can be configured through the PMBus interface and can be stored in NVM as the new default values, to minimize the external component count.
The TPS536C9 device is offered in a thermally enhanced 48-pin QFN packaged and is rated to operate from –40°C to 125°C.
