具有 3 个直流/直流转换器、3 个 LDO、I2C 接口和 DVS 的 TPS65024x 电源管理 IC (PMIC)
| Regulated outputs (#) | 6 |
| Vin (Min) (V) | 2.5 |
| Vin (Max) (V) | 6 |
| Iout (Max) (A) | 1.6 |
| Rating | Catalog |
| LDO | 3 |
| Iq (Typ) (mA) | 0.135 |
| Features | Power Sequencing |
| Processor name | S3C64x |
| Processor supplier | Samsung |
| Shutdown current (ISD) (Typ) (uA) | 16 |
| Switching frequency (Typ) (kHz) | 2250 |
| Configurability | Hardware configurable, Software configurable |
- 1.6-A, 1.0-A, or 0.8-A, 97% Efficient Step-Down Converter for System Voltage (VDCDC1)
- 3.3 V or 2.80 V or Adjustable
- 1.6-A, 1.0-A, or 0.8-A, up to 95% Efficient Step-Down Converter for Memory Voltage (VDCDC2)
- 1.8 V or 2.5 V or Adjustable
- 0.8-A, 90% Efficient Step-Down Converter for Processor Core (VDCDC3)
- Two Selectable Voltages for VDCDC3
- TPS650240:
- DEFDCDC3 = LOW: VO = 1.0 V
- DEFDCDC3 = HIGH: VO = 1.3 V
- TPS650241:
- DEFDCDC3 = LOW: VO = 0.9 V
- DEFDCDC3 = HIGH: VO= 1.375 V
- TPS650242:
- DEFDCDC3 = LOW: VO = 1.0 V
- DEFDCDC3 = HIGH: VO = 1.5 V
- TPS650243:
- DEFDCDC3 = LOW: VO = 1.0 V
- DEFDCDC3 = HIGH: VO = 1.2 V
- TPS650244:
- DEFDCDC3 = LOW: VO = 1.55 V
- DEFDCDC3 = HIGH: VO = 1.6 V
- TPS650245:
- DEFDCDC3 = LOW: VO = 0.9 V
- DEFDCDC3 = HIGH: VO = 1.1 V
- TPS650240:
- 30-mA LDO for Vdd_alive
- 2 × 200-mA General-Purpose LDOs (LDO1 and LDO2)
- Dynamic Voltage Management for Processor Core
- LDO1 and LDO2 Voltage Externally Adjustable
- Separate Enable Pins for Inductive Converters
- 2.25-MHz Switching Frequency
- 85-μA Quiescent Current
- Thermal Shutdown Protection
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The TPS65024x devices are integrated power management ICs for applications powered by one Li-Ion or Li-Polymer cell, which require multiple power rails. The TPS65024x provide three highly efficient, step-down converters targeted at providing the core voltage, peripheral, I/O, and memory rails in a processor-based system. All three step-down converters enter a low power mode at light load for maximum efficiency across the widest possible range of load currents. The converters can be forced into fixed-frequency PWM mode by pulling the MODE pin high.
