| Configuration | 1:1 SPST |
| Number of channels (#) | 4 |
| Power supply voltage - single (V) | 5 |
| Protocols | Analog, JTAG, UART, I2C, SPI, RGMII, TDM, I2S |
| Ron (Typ) (Ohms) | 3 |
| CON (Typ) (pF) | 12.5 |
| ON-state leakage current (Max) (μA) | 10 |
| Bandwidth (MHz) | 200 |
| Operating temperature range (C) | -40 to 85 |
| Features | Undershoot protection |
| Input/output continuous current (Max) (mA) | 128 |
| Rating | Catalog |
- Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
- Bidirectional Data Flow, With Near-Zero Propagation Delay
- Low On-State Resistance (ron) Characteristics
(ron = 3
Typical) - Low Input/Output Capacitance Minimizes Loading and Signal Distortion
(Cio(OFF) = 5 pF Typical) - Data and Control Inputs Provide Undershoot Clamp Diodes
- Low Power Consumption
(ICC = 3 μA Max) - VCC Operating Range From 4 V to 5.5 V
- Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
- Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
- Supports Both Digital and Analog Applications: USB Interface, Bus Isolation, Low-Distortion Signal Gating
The SN74CBT3125C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3125C provides protection for undershoot up to ?2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.
The SN74CBT3125C is organized as four 1-bit bus switches with separate output-enable (1OE\, 2OE\, 3OE\, 4OE\) inputs. It can be used as four 1-bit bus switches or as one 4-bit bus switch. When OE\ is low, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 1-bit bus switch is OFF, and the high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
