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具有逻辑电平转换功能的 CMOS 三路 2 通道模拟多路复用器/多路信号分离器
Configuration | 2:1 SPDT |
Number of channels (#) | 3 |
Power supply voltage - single (V) | 5, 12, 16, 20 |
Protocols | Analog |
Ron (Typ) (Ohms) | 125 |
CON (Typ) (pF) | 9 |
ON-state leakage current (Max) (μA) | 0.3 |
Bandwidth (MHz) | 30 |
Operating temperature range (C) | -55 to 125 |
Features | Break-before-make |
Input/output continuous current (Max) (mA) | 10 |
Rating | Military |
Supply current (Typ) (uA) | 0.04 |
- Wide Range of Digital and Analog Signal Levels
- Digital: 3 V to 20 V
- Analog: ≤ 20 VP-P
- Low ON Resistance, 125 ? (Typical) Over 15 VP-P Signal Input Range for VDD – VEE = 18 V
- High OFF Resistance, Channel Leakage of
±100 pA (Typical) at VDD – VEE = 18 V - Logic-Level Conversion for Digital Addressing Signals of 3 V to 20 V (VDD – VSS = 3 V to 20 V) to Switch Analog Signals to 20 VP-P (VDD – VEE = 20 V) Matched Switch Characteristics, rON = 5 ? (Typical) for VDD – VEE = 15 V Very Low Quiescent Power Dissipation Under All Digital-Control Input and Supply Conditions, 0.2 μW (Typical) at
VDD – VSS = VDD – VEE = 10 V - Binary Address Decoding on Chip
- 5 V, 10 V, and 15 V Parametric Ratings
- 100% Tested for Quiescent Current at 20 V
- Maximum Input Current of 1 μA at 18 V Over Full Package Temperature Range, 100 nA at 18 V and 25°C
- Break-Before-Make Switching Eliminates Channel Overlap
The CD405xB analog multiplexers and demultiplexers are digitally-controlled analog switches having low ON impedance and very low OFF leakage current. These multiplexer circuits dissipate extremely low quiescent power over the full VDD – VSS and VDD – VEE supply-voltage ranges, independent of the logic state of the control signals.
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