PCI Local Bus SpecificationV2.

PCI Local Bus Specification V2.3

The PCI Local Bus is a high performance 32-bit or 64-bit bus with multiplexed address
and data lines. The bus is intended for use as an interconnect mechanism between highly
integrated peripheral controller components, peripheral add-in cards, and
processor/memory systems.
Motivation
When the PCI Local Bus Specification was originally developed in 1992, graphicsoriented
operating systems such as Windows and OS/2 had created a data bottleneck
between the processor and its display peripherals in standard PC I/O architectures.
Moving peripheral functions with high bandwidth requirements closer to the system's
processor bus can eliminate this bottleneck. Substantial performance gains are seen with
graphical user interfaces (GUIs) and other high bandwidth functions (i.e., full motion
video, SCSI, LANs, etc.) when a "local bus" design is used.
PCI successfully met these demands of the industry and is now the most widely accepted
and implemented expansion standard in the world.

PCI Local Bus Applications
The PCI Local Bus has been defined with the primary goal of establishing an industry
standard, high performance local bus architecture that offers low cost and allows
differentiation. While the primary focus is on enabling new price-performance points in
today's systems, it is important that a new standard also accommodates future system
requirements and be applicable across multiple platforms and architectures. Figure 1-1
shows the multiple dimensions of the PCI Local Bus.
The PCI Local Bus has been defined with the primary goal of establishing an industry standard,high performance local bus architecture that offers low cost and allows differentiation.While the primary focus is on enabling new price-performance future system requirements,it is important that a new standard also accommodates future system requirements and be applicable across multiple platforms and architectures.