atxmega64d3汽车8/16位单片机ATMEL AVR XMEGA D3数据表

　　The Atmel AVR XMEGA is a family of low power， high performance， and peripheral rich 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle， the AVR XMEGA devices achieve CPU throughput approaching one million instructions per second （MIPS） per megahertz， allowing the system designer to optimize power consumption versus processing speed. The AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly connected to the arithmetic logic unit （ALU）， allowing two independent registers to be accessed in a single instruction， executed in one clock cycle. The resulting architecture is more code efficient while achieving throughput many times faster than conventional single-accumulator or CISC based microcontrollers. The XMEGA D3 devices provide the following features： in-system programmable flash with read-while-write capabilities; internal EEPROM and SRAM; four-channel event system and programmable multilevel interrupt controller， 50 general purpose I/O lines， 16-bit real-time counter （RTC）; five， 16-bit timer/counters with compare and PWM channels; three USARTs; two two-wire serial interfaces （TWIs）; two serial peripheral interfaces （SPIs）; one sixteen-channel， 12-bit ADC with programmable gain; two analog comparators （ACs） with window mode; programmable watchdog timer with separate internal oscillator; accurate internal oscillators with PLL and prescaler; and programmable brown-out detection. The program and debug interface （PDI）， a fast， two-pin interface for programming and debugging， is available. The ATxmega64D3 devices have five software selectable power saving modes. The idle mode stops the CPU while allowing the SRAM， event system， interrupt controller， and all peripherals to continue functioning. The power-down mode saves the SRAM and register contents， but stops the oscillators， disabling all other functions until the next TWI， or pin-change interrupt， or reset. In power-save mode， the asynchronous real-time counter continues to run， allowing the application to maintain a timer base while the rest of the device is sleeping. In standby mode， the external crystal oscillator keeps running while the rest of the device is sleeping. This allows very fast start-up from the external crystal， combined with low power consumption. In extended standby mode， both the main oscillator and the asynchronous timer continue to run. To further reduce power consumption， the peripheral clock to each individual peripheral can optionally be stopped in active mode and idle sleep mode.