快速原型的数字系统

Rapid Prototyping of Digital Systems provides an exciting and challenging
laboratory component for undergraduate digital logic and computer design courses
using FPGAs and CAD tools for simulation and hardware implementation. The
more advanced topics and exercises also make this text useful for upper level
courses in digital logic, programmable logic, and embedded systems. The SOPC
edition includes Altera’s new Quartus II CAD tool and includes laboratory projects
for Altera’s DE2 and the new DE1 FPGA boards. Student laboratory projects
provided on the book’s DVD include video graphics and text, mouse and keyboard
input, and several computer designs.
Rapid Prototyping of Digital Systems includes four tutorials on the Altera Quartus
II and Nios II tool environment, an overview of programmable logic, and IP cores
with several easy-to-use input and output functions. These features were developed
to help students get started quickly. Early design examples use schematic capture
and IP cores developed for the Altera UP and DE FPGA boards. VHDL is used for
more complex designs after a short introduction to VHDL-based synthesis. Verilog
is also now supported as an option for the student projects.
New chapters in this edition provide an overview of System-On-a-Programmable
Chip (SOPC) technology and SOPC design examples for the DE1 & 2 boards using
Altera’s new Nios II Processor hardware, the C software development tools, an
overview of OS support for SOPC, and the uClinux operating system. A full set of
Altera’s FPGA CAD tools is included on the book’s DVD.