PCA9600 pdf datasheet

The PCA9600 is designed to isolate I
2C-bus capacitance, allowing long buses to be driven
in point-to-point or multipoint applications of up to 4000 pF. The PCA9600 is a
higher-speed version of the P82B96. It creates a non-latching, bidirectional, logic interface
between a normal I
2C-bus and a range of other higher capacitance or different voltage
bus configurations. It can operate at speeds up to at least 1 MHz, and the high drive side
is compatible with the Fast-mode Plus (Fm+) specifications.
The PCA9600 features temperature-stabilized logic voltage levels at its SX/SY interface
making it suitable for interfacing with buses that have non I
2C-bus-compliant logic levels
such as SMBus, PMBus, or with microprocessors that use those same TTL logic levels.
The separation of the bidirectional I
2C-bus signals into unidirectional TX and RX signals
enables the SDA and SCL signals to be transmitted via balanced transmission lines
(twisted pairs), or with galvanic isolation using opto or magnetic coupling. The TX and RX
signals may be connected together to provide a normal bidirectional signal.
n Bidirectional data transfer of I
2C-bus signals
n Isolates capacitance allowing 400 pF on SX/SY side and 4000 pF on TX/TY side
n TX/TY outputs have 60 mA sink capability for driving low-impedance or high-capacitive
buses
n 1 MHz operation on up to 20 meters of wire (see AN10658)
n Supply voltage range of 2.5 V to 15 V with I
2C-bus logic levels on SX/SY side
independent of supply voltage
n Splits I
2C-bus signal into pairs of forward/reverse TX/RX, TY/RY signals for interface
with opto-electrical isolators and similar devices that need unidirectional input and
output signal paths
n Low power supply current
n ESD protection exceeds 4500 V HBM per JESD22-A114, 450 V MM per
JESD22-A115, and 1400 V CDM per JESD22-C101
n Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
n Packages offered: SO8 and TSSOP8 (MSOP8)