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电子发烧友网>电子资料下载>IC datasheet pdf>TMS320LC2403A pdf datasheet

TMS320LC2403A pdf datasheet

2008-08-07 | rar | 1555 | 次下载 | 5积分

资料介绍

The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x generation of
digital signal processor (DSP) controllers, are part of the TMS320C2000 platform of fixed-point DSPs. The
240xA devices offer the enhanced TMS320 DSP architectural design of the C2xx core CPU for low-cost,
low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital
motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While
code-compatible with the existing C24x DSP controller devices, the 240xA offers increased processing
performance (40 MIPS) and a higher level of peripheral integration. See the TMS320x240xA Device Summary
section for device-specific features.
The 240xA generation offers an array of memory sizes and different peripherals tailored to meet the specific
price/performance points required by various applications. Flash devices of up to 32K words offer a
cost-effective reprogrammable solution for volume production. The 240xA devices offer a password-based
“code security” feature which is useful in preventing unauthorized duplication of proprietary code stored in
on-chip Flash/ROM. Note that Flash-based devices contain a 256-word boot ROM to facilitate in-circuit
programming. The 240xA family also includes ROM devices that are fully pin-to-pin compatible with their Flash
counterparts.
All 240xA devices offer at least one event manager module which has been optimized for digital motor control
and power conversion applications. Capabilities of this module include center- and/or edge-aligned PWM
generation, programmable deadband to prevent shoot-through faults, and synchronized analog-to-digital
conversion. Devices with dual event managers enable multiple motor and/or converter control with a single
240xA DSP controller. Select EV pins have been provided with an “input-qualifier” circuitry, which minimizes
inadvertent pin-triggering by glitches.
The high-performance, 10-bit analog-to-digital converter (ADC) has a minimum conversion time of 375 ns and
offers up to 16 channels of analog input. The autosequencing capability of the ADC allows a maximum of
16 conversions to take place in a single conversion session without any CPU overhead.
A serial communications interface (SCI) is integrated on all devices to provide asynchronous communication
to other devices in the system. For systems requiring additional communication interfaces, the 2407A, 2406A,
2404A, and 2403A offer a 16-bit synchronous serial peripheral interface (SPI). The 2407A, 2406A, and 2403A
offer a controller area network (CAN) communications module that meets 2.0B specifications. To maximize
device flexibility, functional pins are also configurable as general-purpose inputs/outputs (GPIOs).
To streamline development time, JTAG-compliant scan-based emulation has been integrated into all devices.
This provides non-intrusive real-time capabilities required to debug digital control systems. A complete suite
of code-generation tools from C compilers to the industry-standard Code Composer Studio debugger
supports this family. Numerous third-party developers not only offer device-level development tools, but also
system-level design and development support.
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