TMS320LF2401A pdf datasheet

The TMS320Lx2401A device, a new member of the TMS320C24x™ generation of digital signal processor (DSP) controllers, is part of the TMS320C2000™ platform of fixed-point DSPs. The Lx2401A device offers the enhanced TMS320™ DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While code-compatible with the existing 240x and C24x™ DSP controller devices, the Lx2401A offers increased processing performance (40 MIPS) and a higher level of peripheral integration. See the TMS320x240xA Device Summary section for device-specific features.

The Lx2401A device offers a peripheral suite tailored to meet the specific price/performance points required by various applications. The Lx2401A also offers a cost-effective reprogrammable solution for volume production. A password-based "code security" feature on the device is useful in preventing unauthorized duplication of proprietary code stored in on-chip Flash/ROM. Note that the LF2401A contains a 256-word boot ROM to facilitate in-circuit programming. The boot ROM on LC2401A is used for test purposes.

The Lx2401A offers an event manager module which has been optimized for digital motor control and power conversion applications. Capabilities of this module include center- and/or edge-aligned PWM generation, programmable deadband to prevent shoot-through faults, and synchronized analog-to-digital conversion. Select EV pins have been provided with an "input-qualifier" circuitry, which minimizes inadvertent pin-triggering by glitches.

The high-performance, 10-bit analog-to-digital converter (ADC) has a minimum conversion time of 500 ns and offers up to 5 channels of analog input. The autosequencing capability of the ADC allows a maximum of 16 conversions to take place in a single conversion session without any CPU overhead.

A serial communications interface (SCI) is integrated on all devices to provide asynchronous communication to other devices in the system. To maximize device flexibility, functional pins are also configurable as general-purpose inputs/outputs (GPIOs).

To streamline development time, JTAG-compliant scan-based emulation has been integrated into all devices. This provides non-intrusive real-time capabilities required to debug digital control systems. A complete suite of code-generation tools from C compilers to the industry-standard Code Composer Studio™ debugger supports this family. Numerous third-party developers not only offer device-level development tools, but also system-level design and development support.