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电子发烧友网>电子资料下载>IC datasheet pdf>CS5165/CS5165A pdf datasheet (

CS5165/CS5165A pdf datasheet (

2008-10-22 | rar | 555 | 次下载 | 3积分

资料介绍

CS5165A 5−Bit Synchronous CPU Buck Controller
The CS5165A synchronous 5−bit NFET buck controller is
optimized to manage the power of the next generation Pentium II
processors. It’s V2 control architecture delivers the fastest transient
response (100 ns), and best overall voltage regulation in the industry
today. It’s feature rich design gives end users the maximum flexibility
to implement the best price/performance solutions for their end
products.
The CS5165A has been carefully crafted to maximize performance and
protect the processor during operation. It has a 5−bit DAC on board that
holds a ±1.0% tolerance over temperature. Its on board programmable
Soft−Start insures a control startup, and the FET nonoverlap circuitry
ensures that both FETs do not conduct simultaneously.
The on board oscillator can be programmed up to 1.0 MHz to give
the designer maximum flexibility in choosing external components
and setting systems costs.
The CS5165A protects the processor during potentially catastrophic
events like overvoltage (OVP) and short circuit. The OVP feature is
part of the V2 architecture and does not require any additional
components. During short circuit, the controller pulses the MOSFETs
in a “hiccup” mode (3.0% duty cycle) until the fault is removed. With
this method, the MOSFETs do not overheat or self destruct.
The CS5165A is designed for use in both single processor desktop and
multiprocessor workstation and server applications. The CS5165A’s
current sharing capability allows the designer to build multiple parallel
and redundant power solutions for multiprocessor systems.
The CS5165A contains other control and protection features such as
Power Good, ENABLE, and adaptive voltage positioning. It is
available in a 16 lead SOIC wide body package.

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