资料介绍
NCP5332A Two-Phase Buck Controller with Integrated Gate Drivers and 5-Bit DAC
The NCP5332A is a second−generation, two−phase step down
controller which incorporates all control functions required to power
high performance processors and high current power supplies.
Proprietary multi−phase architecture guarantees balanced load current
distribution and reduces overall solution cost in high current
applications. Enhanced V2] control architecture provides the fastest
possible transient response, excellent overall regulation, and ease of
use. The NCP5332A is a second−generation PWM controller because
it optimizes transient response by combining traditional Enhanced V2
with an internal PWM ramp and fast−feedback directly from VCORE to
the internal PWM comparator. These enhancements provide greater
design flexibility, facilitate use and reduce output voltage jitter.
The NCP5332A multi−phase architecture reduces output voltage
and input current ripple, allowing for a significant reduction in filter
size and inductor values with a corresponding increase in inductor
current slew rate. This approach allows a considerable reduction in
input and output capacitor requirements, as well as reducing overall
solution size and cost.
The NCP5332A is a second−generation, two−phase step down
controller which incorporates all control functions required to power
high performance processors and high current power supplies.
Proprietary multi−phase architecture guarantees balanced load current
distribution and reduces overall solution cost in high current
applications. Enhanced V2] control architecture provides the fastest
possible transient response, excellent overall regulation, and ease of
use. The NCP5332A is a second−generation PWM controller because
it optimizes transient response by combining traditional Enhanced V2
with an internal PWM ramp and fast−feedback directly from VCORE to
the internal PWM comparator. These enhancements provide greater
design flexibility, facilitate use and reduce output voltage jitter.
The NCP5332A multi−phase architecture reduces output voltage
and input current ripple, allowing for a significant reduction in filter
size and inductor values with a corresponding increase in inductor
current slew rate. This approach allows a considerable reduction in
input and output capacitor requirements, as well as reducing overall
solution size and cost.
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