LPC47b37x pdf datasheet (100 P

The LPC47B37x* is a 3.3V PC99 compliant
Super I/O controller. The LPC47B37x
implements the LPC interface, a pin reduced ISA
interface which provides the same or better
performance as the ISA/X-bus with a substantial
savings in pins used. The part provides 39 GPIO
pins, an SMBus controller and ISA IRQ to serial
IRQ conversion. The part also provides a fan
speed control output and a fan tachometer input.
The LPC47B37x incorporates a keyboard
interface, SMSC's true CMOS 765B floppy disk
controller, advanced digital data separator, two
16C550 compatible UARTs, one Multi-Mode
parallel port which includes ChiProtect circuitry
plus EPP and ECP, and Intelligent Power
Management. The true CMOS 765B core
provides 100% compatibility with IBM PC/XT and
PC/AT architectures in addition to providing data
overflow and underflow protection. The SMSC
advanced digital data separator incorporates
SMSC's patented data separator technology,
allowing for ease of testing and use. The on-chip
UARTs are compatible with the NS16C550. The
parallel port is compatible with IBM PC/AT
architecture, as well as IEEE 1284 EPP and
ECP. The LPC47B37x incorporates
sophisticated power control circuitry (PCC). The
PCC supports multiple low power down modes.
The LPC47B37x supports the ISA Plug-and-Play
Standard (Version 1.0a) and provides the
recommended functionality to support Windows
'95/’98 and PC99. The I/O Address, DMA
Channel and Hardware IRQ of each logical
device in the LPC47B37x may be reprogrammed
through the internal configuration registers.
There are 480 I/O address location options, a
Serialized IRQ interface, and three DMA
channels.