资料介绍
The HMU16/883 is a high speed, low power CMOS 16 x 16-bit
parallel multiplier ideal for fast, real time digital signal processing
applications. The 16-bit X and Y operands may be
independently specified as either two’s complement or
unsigned magnitude format, thereby, allowing mixed mode
multiplication operations.
Additional inputs are provided to accommodate format
adjustment and rounding of the 32-bit product. The Format
Adjust control allows the user to select a 31-bit product with
the sign bit replicated in the LSP. The round control provides
for rounding the most significant portion of the result by adding
one to the most significant bit of the LSP.
Two 16-bit Output Registers (MSP and LSP) are provided to
hold the most and least significant portions of the result,
respectively. These registers may be made transparent for
asynchronous operation through the use of the Feedthrough
Control (FT). The two halves of the product may be routed to
a single 16-bit three-state output port via the output multiplexer
control, and in addition, the LSP is connected to the Yinput
port through a separate three-state buffer.
The HMU16/883 utilizes independent clock signals (CLKX,
CLKY, CLKL, CLKM) to latch the input operands and output
Product Registers. This configuration maximizes throughput
and simplifies bus interfacing. All outputs of the HMU16/883
also offer three-state control for multiplexing onto multi-use
system busses.
parallel multiplier ideal for fast, real time digital signal processing
applications. The 16-bit X and Y operands may be
independently specified as either two’s complement or
unsigned magnitude format, thereby, allowing mixed mode
multiplication operations.
Additional inputs are provided to accommodate format
adjustment and rounding of the 32-bit product. The Format
Adjust control allows the user to select a 31-bit product with
the sign bit replicated in the LSP. The round control provides
for rounding the most significant portion of the result by adding
one to the most significant bit of the LSP.
Two 16-bit Output Registers (MSP and LSP) are provided to
hold the most and least significant portions of the result,
respectively. These registers may be made transparent for
asynchronous operation through the use of the Feedthrough
Control (FT). The two halves of the product may be routed to
a single 16-bit three-state output port via the output multiplexer
control, and in addition, the LSP is connected to the Yinput
port through a separate three-state buffer.
The HMU16/883 utilizes independent clock signals (CLKX,
CLKY, CLKL, CLKM) to latch the input operands and output
Product Registers. This configuration maximizes throughput
and simplifies bus interfacing. All outputs of the HMU16/883
also offer three-state control for multiplexing onto multi-use
system busses.
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