资料介绍
The MAX9526 is a low-power video decoder that converts NTSC or PAL composite video signals to 8-bit or 10-bit YCbCr component video compliant with the ITUR BT.656 standard. The device powers up in fully operational mode and automatically configures itself to decode the detected input standard. The MAX9526 typically consumes 200mW of power in normal operation and typically less than 100µW in shutdown mode.
An internal 10-bit, 54MHz analog-to-digital converter (ADC) samples the input with four times oversampling. The MAX9526 features a DC restoration circuit with offset correction and automatic gain control to accurately optimize the full-scale range of the ADC.
An integrated analog anti-aliasing filter eliminates the need for external filtering. The MAX9526 includes a 2:1 input multiplexer with automatic signal selection based on activity at the inputs.
An internal line-locked phase-locked loop (PLL) generates the sample clock and the line-locked clock (LLC) output to provide an ITU-compliant output. Alternatively, the PLL can be configured to provide a sample clock and output clock at 2x and 1x the frequency of the crystal oscillator, respectively.
The MAX9526 provides a multiline adaptive comb filter to reduce cross-chrominance and cross-luminance artifacts.
A single 1.8V supply is used for both the digital and analog supplies. The digital outputs operate from a separate +1.7V to +3.45V supply to allow direct connection to a wide range of digital processors. The MAX9526 operates over the -40°C to +125°C automotive temperature range and is available in both a 28-pin QSOP and a 32-pin TQFN (5mm x 6mm).
An internal 10-bit, 54MHz analog-to-digital converter (ADC) samples the input with four times oversampling. The MAX9526 features a DC restoration circuit with offset correction and automatic gain control to accurately optimize the full-scale range of the ADC.
An integrated analog anti-aliasing filter eliminates the need for external filtering. The MAX9526 includes a 2:1 input multiplexer with automatic signal selection based on activity at the inputs.
An internal line-locked phase-locked loop (PLL) generates the sample clock and the line-locked clock (LLC) output to provide an ITU-compliant output. Alternatively, the PLL can be configured to provide a sample clock and output clock at 2x and 1x the frequency of the crystal oscillator, respectively.
The MAX9526 provides a multiline adaptive comb filter to reduce cross-chrominance and cross-luminance artifacts.
A single 1.8V supply is used for both the digital and analog supplies. The digital outputs operate from a separate +1.7V to +3.45V supply to allow direct connection to a wide range of digital processors. The MAX9526 operates over the -40°C to +125°C automotive temperature range and is available in both a 28-pin QSOP and a 32-pin TQFN (5mm x 6mm).
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