AD1893,pdf datasheet (Sample R

The AD1893 has a pin selectable slow- or fast-settling mode.
This mode determines how quickly the ASRC adapts to a
change in either the input sample clock frequency (FSIN) or the
output sample clock frequency (FSOUT). In the slow-settling
mode, the control loop which computes the ratio between FSIN
and FSOUT settles in approximately 800 ms and begins to reject
jitter above 3 Hz. The slow-settling mode offers the best signal
quality and the greatest jitter rejection. In the fast-settling mode,
the control loop settles in approximately 200 ms and begins to
reject jitter above 12 Hz. The fast-settling mode allows rapid,
real time sample rate changes to be tracked without error, at the
expense of some narrowband noise modulation products on the
output signal.