Introduction to CPLD and FPGA

Field Programmable Gate Arrays (FPGAs) are becoming a critical part of
every system design. Many vendors offer many different architectures and
processes. Which one is right for your design? How do you design one of these
so that it works correctly and functions as you expect in your entire system?
These are the questions that this paper sets out to answer.
The first sections of this paper deals with the internal architecture and
characteristics of these devices. Programmable logic devices are described in
an overview, leading up to a detailed description of the Field Programmable
Gate Array. The various architectures of these devices are examined in detail
along with their tradeoffs, which allow you to decide which particular device
is right for your design.
The next sections of this paper is about the design flow for an FPGAbased
project. This section describes the phases of the design that need to be
planned. This allows a designer or project manager to allocate resources and
create a schedule.
The final sections of this paper discuss in detail, the design, simulation,
and testing issues that arise when designing an FPGA. Understanding these issues
will allow you to design a chip that functions correctly in your system and will
be reliable throughout the lifetime of your product.