FPGA时分多址的改进型实现方法

利用FPGA实现时分多址的方法有很多种，但大多数方法都对FPGA芯片资源的占用非常巨大。针对这一问题，提出一种改进型方法来实现时分多址。通过使用FPGA芯片内部的双口随机访问存储器（双口RAM），利用同一块RAM采用两套时钟线，地址线和数据线，例化双口RAM的IP核后，在占用较少FPGA芯片资源的前提下，信号实现了时分多址格式的传输。通过对程序进行仿真和验证，证明了该算法的可用性，与传统方法相比，芯片资源的占用率明显降低。

Abstract:

 There were lots of methods which could realize the TDMA transmission by FPGA, but many methods occupied too much resources on the FPGA chip. To solve this problem, the paper presented an improved method to realize the time division multiple access, through the using of dual-port random access memory （RAM） on the chip, and with the same piece of RAM used two clock lines, address lines and data lines, by the IP core of dual-port’s cited, we could achieve a TDMA transmission frame format by occupying less FPGA chip resources. With simulating and verifying to the method, the availability of the method is validated. Compared with traditional methods, the chip resource utilization reduces obviously.