Low-Voltage CMOS Log Compandin

This chapter is devoted to introducing the context of the presented
work. Motivations for CMOS implementations of low-power systemon-
chip applications are explained first. Then, limitations of the stateof-
the-art CMOS analog techniques are studied. As a result, the Instantaneous
Companding Theory is chosen here as the most efficient
and complete signal processing alternative for very low-voltage operation.
A short overview of this theory is presented through a generalized
device-independent nomenclature. Problems on migration from previous
bipolar implementations of this theory to modern CMOS processes
are argued. Hence, the final goal of this work is defined as the research
on novel CMOS analog circuit techniques compatible with CMOS technologies,
which should exploit the low-voltage capabilities of Log Companding
processing.