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电子发烧友网>电子资料下载>模拟数字>CD4541BC英文资料 CMOS 可编程振荡器、计时器

CD4541BC英文资料 CMOS 可编程振荡器、计时器

2010-01-08 | rar | 69 | 次下载 | 5积分

资料介绍

The CD4541BC Programmable Timer is designed with a
16-stage binary counter, an integrated oscillator for use
with an external capacitor and two resistors, output control
logic, and a special power-on reset circuit. The special features
of the power-on reset circuit are first, no additional
static power consumption and second, the part functions
across the full voltage range (3V–15V) whether power-on
reset is enabled or disabled.
Timing and the counter are initialized by turning on power,
if the power-on reset is enabled. When the power is
already on, an external reset pulse will also initialize the
timing and counter. After either reset is accomplished, the
oscillator frequency is determined by the external RC network.
The 16-stage counter divides the oscillator frequency
by any of 4 digitally controlled division ratios.

Features
 Available division ratios 28, 210, 213, or 216
 Increments on positive edge clock transitions
Built-in low power RC oscillator (±2% accuracy over
temperature range and ±10% supply and ±3% over processing@ < 10 kHz)
 Oscillator frequency range » DC to 100 kHz
 Oscillator may be bypassed if external clock is available
(apply external clock to pin 3)
 Automatic reset initializes all counters when power turns
on  External master reset totally independent of automatic reset operation
 Operates at 2n frequency divider or single transition timer
 Q/Q select provides output logic level flexibility
 Reset (auto or master) disables oscillator during resetting
to provide no active power dissipation
 Clock conditioning circuit permits operation with very
slow clock rise and fall times
 Wide supply voltage range—3.0V to 15V
 High noise immunity—0.45 VDD (typ.)
 5V–10V–15V parameter ratings
 Symmetrical output characteristics
 Maximum input leakage 1 mA at 15V over full temperature range
 High output drive (pin 8) min. one TTL load

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