Interfacing 3V and 5V applicat

THE NEED FOR INTERFACING BETWEEN 3V
AND 5V SYSTEMS
Many reasons exist to introduce 3V1 systems, notably the lower
power consumption for mobile applications and the introduction of
parts that use technologies with such fine geometries that 5V is
simply not allowed any more.
The introduction of the 3V standard as supply voltage has resulted
in many design activities for digital systems. Very often, however,
there is a gradual transition from 5V to 3V, since not always are all
required components available, or the system is rather complex so
that 3V is introduced in part of a system. As an example, customers
wish to use an existing and proven CPU, while a new, more complex
ASIC with added features can only be made with 3V. Or vice versa!
With the introduction of new standards such as 2.2-2.7V or even
1.7V we expect that interfacing between systems that use different
supply voltages will be an actual issue for many years to come. This
application note specifically addresses the interfacing between 3V
and 5V systems, but the results can be applied for interfacing
between other voltage levels as well.
We will discuss how one can ensure reliable information exchange
and how to prevent current flow between both supply voltages when
interfacing logic with memories, ASICs, PLDs and microprocessors
at different supply voltages.