新型DPWM 方法及其在高频DC/DC变换器中的应用

本文提出一种基于多位MASH（Multi-stAge-noise-Shaping）结构Δ-Σ 调制器的新型DPWM（Digital-Pulse-Width-Modulator）方法，在详细论述该DPWM 方法原理的基础上，并以同步整流Buck变换电路为例，基于Virtex-Ⅱ FPGA 控制策略，实现了高达4MHz 的开关频率和11 位的有效分辨率DPWM。仿真和实验结果证明了该控制器的可行性和有效性。
Abstract: This paper proposed a novel multi-bit Delta-Sigma (Δ-Σ) concept of Multi-stAge-noise-SHaping (MASH) modulator. The principle of the DPWM was introduced in detail. The implementation techniques are experimentally verified using a Virtex-II FPGA and a discrete low-power synchronous buck converter. In these conditions the proposed controller can operate at programmable constant switching frequency up to 4MHz with 11-bit effective DPWM resolution
关键词：数字控制，多位MASH 结构Δ-Σ DPWM，FPGA 实现
Keywords: Digital Control, multi-bit Delta-Sigma (Δ-Σ) MASH modulator, FPGA implementation