如何相移可以帮助改善性能的DC / DC转换器

　　如何相移可以帮助改善性能的DC / DC转换器

　　。现代电子系统板的集成电路如FPGA，DSP，微处理器，存储器和ASIC芯片。此外，还有音频放大器和射频功率放大器模块板上与声音和无线通信。这种电路板上的每个器件或模块对电压和电流有不同的要求。因此，在分布式电源架构，这些半导体器件和模块是由多种负荷切换点（POL）供电的直流/直流转换器，获得他们的输入从一个共同的总线电压以产生所需的电压或电压的半导体集成电路和模块。

　　从一个单一的源产生一系列的调节直流输出电压施加高均方根（RMS）电流纹波和噪声问题的直流输入源。为了解决噪声问题，设计师通常使用额外的成本输入滤波。由于每个开关转换器使用不同的开关频率，拍频100赫兹和23千赫之间产生的，它可以降低系统音频放大器的性能。

　　Recently， Intersil published a white paper1 describing how the input RMS current ripple and noise can be minimized by preventing the on-time overlapping of these multiple， on-board DC/DC converters using phase-shifting techniques. In reality， this technique also improves EMI and eliminates the need for input filtering， while tackling the problems linked with beat frequencies.

　　This article examines how multiple DC/DC buck regulators are organized in a master/slave configuration using phase-shifting time delays to improve the noise performance on the source input of these on-board DC/DC converters. It also demonstrates the implementation of the phase-shifting time delay technique using Intersil’s synchronous buck regulator ISL8018， which is tailored for this design. In addition， by synchronizing multiple DC/DC converters using the same clock， the article also shows that beat-frequency problems can be eliminated from the system.