PCI时钟发生器IC锁相环分频器两个输出ad9573数据表

　　The AD9573 provides a highly integrated， dual output clock generator function including an on-chip PLL core that is optimized for PCI-e applications. The integer-N PLL design is based on the Analog Devices， Inc.， proven portfolio of high performance， low jitter frequency synthesizers to maximize line card performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. The PLL section consists of a low noise phase frequency detector （PFD）， a precision charge pump， a low phase noise voltage controlled oscillator （VCO）， and a preprogrammed feedback divider and output divider. By connecting an external 25 MHz crystal， output frequencies of 100 MHz and 33.33 MHz can be locked to the input reference. The output divider and feedback divider ratios are preprogrammed for the required output rates. No external loop filter components are required， thus conserving valuable design time and board space. The AD9573 is available in a 16-lead 4.4 mm × 5.0 mm TSSOP and can be operated from a single 3.3 V supply. The temperature range is −40°C to +85°C.