三重200毫安低噪声高电源抑制比的电压调节器ADP320数据表

　　The ADP320 200 mA triple output LDO combines high PSRR， low noise， low quiescent current， and low dropout voltage in a voltage regulator ideally suited for wireless applications with demanding performance and board space requirements. The low quiescent current， low dropout voltage， and wide input voltage range of the ADP320 triple LDO extend the battery life of portable devices. The ADP320 triple LDO maintains power supply rejection greater than 60 dB for frequencies as high as 100 kHz while operating with a low headroom voltage. The ADP320 triple LDO offers much lower noise performance than competing LDOs without the need for a noise bypass capacitor. The ADP320 triple LDO is available in a miniature 16-lead 3 mm × 3 mm LFCSP package and is stable with tiny 1 µF ±30% ceramic output capacitors， resulting in the smallest possible board area for a wide variety of portable power needs. The ADP320 triple LDO is available in output voltage combinations ranging from 0.8 V to 3.3 V and offers over current and thermal protection to prevent damage in adverse conditions.