ADP5033双3兆赫800毫安降压两个300毫安LDO稳压器

　　The ADP5033 combines two high performance buck regulators and two low dropout regulators （LDO） in a tiny， 16-ball， 2 mm × 2 mm WLCSP to meet demanding performance and board space requirements. The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set high， the buck regulators operate in forced PWM mode. When the MODE pin is set low， the buck regulators operate in PWM mode when the load current is above a predefined threshold. When the load current falls below a predefined threshold， the regulator operates in power save mode （PSM）， improving the light load efficiency. The two bucks operate out of phase to reduce the input capacitor requirement and noise. The low quiescent current， low dropout voltage， and wide input voltage range of the ADP5033 LDO extend the battery life of portable devices. The ADP5033 LDOs maintain power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.