ti_omap-l138_layout

ti_omap-l138_layout，TI公司的ARM+DSP芯片Omap-138的布局图，很有帮助

The OMAP-L138 applications processor enables the quick design of connected， high-precision products at a low price. It provides significantly lower power than other members of the TMS320C6000™ platform of DSPs; featuring robust operating systems support， rich user interfaces， and high processing performance life through the maximum flexibility of a fully integrated mixed processor solution. The processor is based on the C674x floating-point DSP core plus an ARM9™， providing up to 300 MHz per core. With the on-chip ARM9， developers can leverage the floating-point DSP for real-time， processingintensive computations while off-loading non-real-time tasks to the ARM. This functionality enables developers to design more feature-rich end products that include Graphical User Interfaces （GUIs）， touch screens and/or networking stacks. Additionally， developers can use the ARM to implement various high-level operating systems such as VxWorks， WinCE or Linux. The C674x DSP core is programmable in either fixed point or floating point and is code compatible with existing C64x+™ and C67x+™ DSP devices. The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-bit， 16-bit， or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously.

The OMAP-L138 DSP core uses a two-level cache-based architecture. The Level 1 Program （L1P） cache is a 32 KB direct mapped cache and the Level 1 Data （L1D） cache is a 32 KB two-way set-associative cache. The Level 2 Program （L2P） cache consists of a 256 KB memory space that is shared between program and data space. L2 also has a 1024 KB ROM. L2 memory can be configured as mapped memory， cache， or combinations of the two. Features • Dual core SoC – 300 MHz ARM926EJ-S™ RISC MPU – 300 MHz C674x VLIW DSP • Three configurable 16550 type UART modules • Power management/power savings – Real-Time Clock （RTC） with crystal input， separate clock domain， separate power supply – Supports individual power-down modes • 10/100 Mb/s Ethernet MAC （EMAC） • Up to 448 KB on-chip RAM including 128 KB RAM shared memory • LCD controller • Two Multimedia Card （MMC）/Secure Digital （SD） card interface with Secure Data I/O （SDIO） • USB 1.1 OHCI （host） with integrated PHY