介绍使用PCA8550对P6实现无跳线的频率配置,并将PCA

As the block diagram in Figure 1 illustrates, the PCA8550 consists of eight stages which are conveniently grouped into one integrated circuit. These 8 stages are listed below.
The PCA8550’s Eight Stages:
1. Nine internal pull–ups (10– 150 W) on the four pass-through inputs to avoid floats
2. I2C interface logic to communicate between the two I2C inputs and the 5-bit E2PROM
3. A 5-bit E2PROM to store the packets transferred through the I2C inputs SCL and SDA
4. Five AND gates to drive the E2PROM outputs (Q0 – Q4) low upon override
5. A 4–bit mux to select between E2PROM outputs (Q0–Q3) and the pass–through inputs
6. A 1–bit latch to retain the value of the 5th E2PROM output, NON_MUXED_OUT (Q4)
7. A 1–bit inverter to enable this latch upon request (of the MUX_SELECT pin)
8. A 4–bit buffer to convert the 3.3V CMOS multiplexer outputs into 2.5V outputs