AGM CPLD DATASHEET AG_CPLD_Rev

General Description
AGM CPLD family provides low－cost instant－on， non－volatile CPLDs， with densities from 256， 272 to 576 logic LUTs and non－volatile flash storage of 256Kbits。 The devices offer up to 144 I／O pins featuring with a user flash memory （UFM）， and in－system programming。 The devices are designed to reduce cost and power while providing programmable solutions for a  wide range of applications。
 Features
1、Low－Cost and low－power CPLD
2、Instant－on， non－volatile Compatible FPGA architecture。
3、Up to 4 global clock lines in the global clock network that drive throughout the entire device。
4、Provides programmable fast propagation delay and clock－to－output times。
5、Provides PLL per device provide clock multiplication and phaseshifting （AG256 has no PLL）。
6、UFM supports non－volatile storage up to 256 Kbits。
7、Supports 3.3－V， 2.5－V， 1.8－V， and 1.5－V logic level
8、Programmable slew rate， drive strength， bus－hold， programmable pull－up resistors， open－drain output， Schmitt triggers
 and programmable input delay。
9、Built－in Joint Test Action Group （JTAG） boundary－scan test （BST） circuitry complaint with IEEE Std. 1149.1－1990
10、ISP circuitry compliant with IEEE Std。 1532
11、3.3－V， 2.5－V， 1.8－V， 1.5－V LVCMOS and LVTTL standards
12、Emulated LVDS output （LVDS＿E＿3R）
13、Emulated RSDS output （RSDS＿E＿3R）
14、Operating junction temperature from －40 to 100 ℃