双DSP结构的捷联控制与解算系统设计

设计了基于双DSP 结构的捷联控制与解算系统，该系统以高性能的浮点处理器TMS320VC33 作为捷联系统实时解算的核心，以TMS320VC5402 作为通道控制、数据采
集的控制核心，并结合FPGA 的组合逻辑和时序逻辑，构成了高集成度的嵌入式系统。该系统具有采样速度快、浮点处理精度高、稳定性好等特点，可以充分满足捷联导航系统的要求。
关键词：捷联惯导系统；DSP；FPGA；HPI
Abstract：The strapdown controlling and solution system based on the structure of double
DSP is designed. This system includes high-performance floating point processor
TMS320VC33,which acts as real-time solution core of strapdown system, as well as TMS
320VC5402,which services as the core to be master of access controlling and data acquisition.
This system is a kind of embedded high-integration system which has FPGA assembled and
scheduling logic. The system has the characteristics of fast sampling, high precision of floating point processing, stability, and etc. It can fully satisfy the requirements of strapdown system.
Key words： strapdown inertial system; DSP; FPGA ; HPI