• AD5629R

• EVAL-AD5629RSDZ

This document presents the steps to setup an environment for using the EVAL-AD5629RSDZ evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD5629RSDZ Evaluation Board with the Xilinx KC705 board.

Below is presented a picture of SDP-B Controller Board with the EVAL-AD5629RSDZ Evaluation Board.

The AD5629R device is low power, octal, 12-bit, buffered voltage-output DAC. Device is guaranteed monotonic by design. The AD5629R has an on-chip reference with an internal gain of 2. The AD5629R-1 has a 1.25 V, 5 ppm/°C reference, giving a full-scale output range of 2.5 V. The AD5629R-2/AD5629R-3 have a 2.5 V 5 ppm/°C reference, giving a full-scale output range of 5 V depending on the option selected. Devices with 1.25 V reference selected operate from a single 2.7 V to 5.5 V supply. Devices with 2.5 V reference selected operate from 4.5 V to 5.5 V. The on-chip reference is off at power-up, allowing the use of an external reference. The internal reference is enabled via a software write. The parts incorporate a power-on reset circuit to ensure that the DAC output powers up to 0 V (AD5629R-1/AD5629R-2) or midscale (AD5629R-3) and remains powered up at this level until a valid write takes place. The part contains a power-down feature that reduces the current consumption of the device to 400 nA at 5 V and provides software-selectable output loads while in power-down mode for any or all DAC channels.

The EVAL-AD5629R evaluation board is designed to help customers quickly prototype new AD5629R circuits and reduce design time. To power the AD5629R evaluation board supply 5V between the AVDD and AGND inputs for the analog supply.

• AD5629R Product Info - pricing, samples, datasheet
• EVAL-AD5629R evaluation board user guide
• Xilinx KC705 FPGA board

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

• Xilinx KC705 FPGA board
• FMC-SDP adapter board
• EVAL-AD5629R evaluation board

• Xilinx ISE 14.6.
• UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200.
• The EVAL-AD5629R reference project for Xilinx KC705 FPGA.

• Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
• Connect the JTAG and UART cables to the KC705 and power up the FPGA board.

The following commands were implemented in this version of EVAL-AD5629R reference project for Xilinx KC705 FPGA board.

Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.

The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral.