• ADF4002

• EVAL-ADF4002SD1Z

This document presents the steps to setup an environment for using the EVAL-ADF4002SD1Z evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-ADF4002SD1Z Evaluation Board with the Xilinx KC705 board.

For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices System Demonstration Platform (SDP). The SDP consists of a:

• a controller board, like the EVAL-SDP-CS1Z (SDP-S)
• a compatible Analog Devices SDP product evaluation board
• corresponding PC software

The EVAL-SDP-CS1Z controller board is Serial Interfaces Only, low cost, reduced functionality controller board. It has a USB to Serial Engine at its core. It connects to the PC through a USB 2.0 high speed port. The SDP-S has a single 120 pin connector and exposes SPI, I2C and GPIO interfaces to connected SDP daughter boards.

The EVAL-ADF4002SD1Z is designed to allow the user to evaluate the performance of the ADF4002 frequency synthesizer, used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. Figure 1 shows the board, which contains the ADF4002 synthesizer, an SMA connector for the reference input, power supplies, and an RF output. There is also a footprint for a loop filter and a VCO on board.

The ADF4002 frequency synthesizer is used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, and programmable N divider. The 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the part can be used as a standalone PFD and charge pump.

• ADF4002 Product Info - pricing, samples, datasheet
• EVAL-ADF4002SD1Z evaluation board user guide
• Xilinx KC705 FPGA board

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

• Xilinx KC705 FPGA board
• FMC-SDP adapter board
• EVAL-ADF4002SD1Z evaluation board

• Xilinx ISE 14.6.
• UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200.

• Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
• Connect the JTAG and UART cables to the KC705 and power up the FPGA board.

The following commands were implemented in this version of EVAL-ADF4002SD1Z reference project for Xilinx KC705 FPGA board.

Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.

The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral.