MAX2557 多频、多模RF至比特Femto基站无线接收器

MAX2557 多频、多模RF至比特Femto基站无线接收器

The MAX2557 direct-conversion RF-to-bits radio receiver is designed for HSPA-FDD femto basestations in bands II and V. The device has dedicated receive paths to enable downlink activities in both bands. The MAX2557 also provides GSM monitoring capability in the U.S. cellular and U.S. PCS bands.

The unique RF-to-bits architecture of the MAX2557 integrates four LNAs with inputs/outputs internally matched to 50Ω, quadrature mixers, baseband anti-aliasing filters, programmable-gain RF and baseband amplifiers, fractional-N RF synthesizer, RF VCO, fractional-N frequency synthesizer for ADC sampling clock, and high-dynamic-range I/Q continuous-time sigma-delta ADCs. The sigma-delta modulators perform I and Q analog-to-digital conversion onto 1-bit digital streams. A programmable LVDS-like interface, with its own frac-N clock generation system, is used for the data transfer to the baseband/DSP, where the final decimation, equalization, and digital channel filtering are performed in compliance with the MAX-PHY digital section definition. Digital IP blocks are available from Maxim. The MAX2557 modes of operation are programmable by a 3-wire serial bus.

The MAX2557 is specified for operation in the extended -40°C to +85°C temperature range and is available in a 7mm x 7mm x 1.4mm fcLGA package with exposed paddle (EP).

Complete RF-to-Digital-Bits Radio Receiver Subsystem

Supports

• HSPA-FDD Bands II and V Uplink
• HSPA-FDD Bands II and V Downlink Monitoring
• GSM Monitoring in U.S. Cellular and PCS Bands

TS25.104 Compliant

Compatible with UMTS1900 and UMTS850 Interference Environments

High-Dynamic-Range Continuous-Time Sigma-Delta ADCs Allow Simple AGC Implementation with Switched Gain States

MAX-PHY Digital Rx Interface with Single-Bit I/Q Bitstream, No Analog Signals

On-Chip Fractional-N Frequency Synthesizers for LO and Sampling Clock Generation

Dual-Buffered Reference Outputs to Drive Transmit IC and Baseband DSP

Programmable Rail-to-Rail GPO Pins Controlled by Serial Interface for External Component Control

Operation Controlled Entirely by 3-Wire Serial Interface, No Analog Control Signals Necessary

 UMTS femto—波段II和V基站