段选显示值译码 - BJ-EPM CPLD开发板：VHDL入门例程4

--段选显示值译码

　　process(Clk,Rst_n)

　　begin

　　if (Rst_n = '0') then --异步复位

　　Sm_db_out <= "0000000";

　　elsif (Clk'event AND Clk = '1') then --时钟上升沿

　　case num is

　　when x"0" => Sm_db_out <= "0111111"; --显示“0”

　　when x"1" => Sm_db_out <= "0000110"; --显示“1”

　　when x"2" => Sm_db_out <= "1011011"; --显示“2”

　　when x"3" => Sm_db_out <= "1001111"; --显示“3”

　　when x"4" => Sm_db_out <= "1100110"; --显示“4”

　　when x"5" => Sm_db_out <= "1101101"; --显示“5”

　　when x"6" => Sm_db_out <= "1111101"; --显示“6”

　　when x"7" => Sm_db_out <= "0000111"; --显示“7”

　　when x"8" => Sm_db_out <= "1111111"; --显示“8”

　　when x"9" => Sm_db_out <= "1101111"; --显示“9”

　　when x"a" => Sm_db_out <= "1110111"; --显示“A”

　　when x"b" => Sm_db_out <= "1111100"; --显示“B”

　　when x"c" => Sm_db_out <= "0111001"; --显示“C”

　　when x"d" => Sm_db_out <= "1011110"; --显示“D”

　　when x"e" => Sm_db_out <= "1111001"; --显示“E”

　　when x"f" => Sm_db_out <= "1110001"; --显示“F”

　　when others => Sm_db_out <= "0000000";

　　end case;

　　end if;

　　end process;

　　--位选有效

　　Sm_cs_n_out <= "00";

　　end architecture SEG_DISPLAY;